I'm Roya, Hardware Design Manager at Teradyne, where I architect high-speed signal delivery systems—56 Gbps PAM4 interfaces, 1000+ channel cabled systems, and more. I hold 4 patents in ATE interface design and specialize in signal integrity, electromagnetic simulation, and electromechanical product development.
I studied electrical engineering at UCLA and MIT, building the foundation for work that bridges hardware, physics, and precision at scale.
Ask me about signal integrity, high-speed interface design, electromagnetic simulation, and hardware product development.
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